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 AMD Ryzen, AM4 / AM5 Platform

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Bonchi
post Apr 26 2021, 11:48 AM

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QUOTE(1024kbps @ Apr 26 2021, 09:30 AM)
As i said before, you can use generic optimization and your program will still run from P4 until latest gen, but it wont be as fast with architecture specific optimization enabled.
https://www.rarewares.org/ogg-oggenc.php this Vorbis encoder is one example.

every new gen will come with at least few new SIMD, we bought the expensive CPU, ain't we gonna fully utilize it all? other wise what's the point of using new CPU?
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Not really, this current zen architecture have a list of don'ts that will cause a generic compiler to fail for c++ and java. Forcing you to do optimization but will cause compatibility with other systems like intel.

This post has been edited by Bonchi: Apr 26 2021, 11:49 AM
Bonchi
post Apr 26 2021, 02:23 PM

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QUOTE(1024kbps @ Apr 26 2021, 02:15 PM)
you mixed up with compiler error and compiler generated code error.
Unless your code are really complex like ffdshow. most compiler will just work fine whatever you throw at it.
Most dev will just use quick hax to workaround the compiler bug.

for compatibility reason, dev can just write complex cpu detection to avoid certain SIMD crashing on older CPU, like most of the programs we're using.
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Im refering to compiler error not code generated error and precisely on SIMD crashing. Even with npm node, and python, you'll encounter some hiccups with zen architecture especially when youre doing fullstack. You go stack overflow and youd see tonnes of it and it needs some troubleshooting and a few workarounds. However most cases once the issue is solved then no problems running them on intel based env
Bonchi
post Apr 26 2021, 02:26 PM

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QUOTE(yimingwuzere @ Apr 26 2021, 02:20 PM)
Never thought of swapping RAM sticks! I just plugged the Bolt XR in another rig, it POSTed just fine, assumed it was not a RAM issue and never considered RAM compatibility with the BIOS.

Let me see if the BIOS flashback option works. I presume it functions even without working RAM?
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Gigabyte bios flashback works by unplugging everything including the ram and cpu except the mobo power. Got a bunch of vid guides and the file name is important.
Bonchi
post Apr 26 2021, 08:29 PM

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QUOTE(1024kbps @ Apr 26 2021, 07:37 PM)
Node npm use Javascript and python are inteperted language, just update the the compiler would do and they are platform independent.
I'm more on multimedia side and recently just started trying gentoo Linux on vm, and macos bigsur, totally running fine . Except some hiccup such as crash after updating the vm os. At least I don't see any bsod anymore
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Using these in daily basis along with custom etl tools or coding backend APIs. copying codes and compiler across from one platform to amd will most likely have issues like crashing or cpu utilization stuck at 100% due to an infinite loop happening somewhere in the micrcode level. And you should very well know that you dont simply update the compiler lol.. especially if you have a very large project. I guess it will take some time, usually it's AMD's responsibility to fix it like last time they had issue on a random number gen.

This post has been edited by Bonchi: Apr 26 2021, 08:32 PM
Bonchi
post May 14 2021, 08:14 PM

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QUOTE(edmund_yung @ May 14 2021, 07:28 PM)
All these issue are for people who wanted to run their RAM over 3800MTS right? Average joe like myself who wanted to just run them at 3600 CL16-3800 C18 are fine right?
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4800MTS goes brrrrrrr
Bonchi
post May 16 2021, 04:05 PM

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QUOTE(sai86 @ May 16 2021, 03:55 PM)
Done benching, avg latency is 63+ now.
Not going to enable R-Bar at the moment since the effect is not consistent and varies according to the game itself.

Really thanks alot for your detail guide and time for this afternoon on tuning PBO and RAM. the time spent this half-days is the best.  notworthy.gif
coming from haswell, nowadays OC so many things to play around and fine-tuning.
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remember to run memtest for at least 8 passes after that which will take about 8 hours to validate the settings are properly stable.
Bonchi
post May 16 2021, 05:34 PM

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QUOTE(sai86 @ May 16 2021, 04:29 PM)
noted. will do it from time to time.
day2day usage should able to determine all the adjustment done today whether its stable enough  biggrin.gif
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dont wehhh... not all ram error will cause a crash but instead it will slowly corrupt system files and may suddenly brick your whole OS one day. That's why running memtest86 outside of windows is recommended. when that is stable for 2 passes then maybe can do HKEPC/memtestpro which is more punishing to the ram.

I learn the hard way last time and needed to do a full windows reinstall. PC was stable for months but suddenly just kept crashing, didnt run memtest because was a noob back then. errors reported almost immediately when I run memtest despite being "stable" for months on day to day use.

This post has been edited by Bonchi: May 16 2021, 05:38 PM
Bonchi
post May 16 2021, 07:35 PM

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QUOTE(JohnLai @ May 16 2021, 06:53 PM)
Agree.
If sai86 is not DOS person, OCCT can be used too.
OCCT Memory stress has two modes:
AVX = this one will test the dimm
SSE = this one test the memory controller.

In fact, MEMBench also can be used to test for error.
Change the MEMBench mode to "Memtest", make sure "stop on error" is checked.
My biggest mistake when I tested it on 5600x before was I didn't check the box. Ended up the windows filled by lotta prompt showing error at certain memory sectors. sweat.gif  Forced to do a restart manually because too many windows prompts.
What is the cooler you use?  sweat.gif
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Here's one china app for memtest but i feel that it tortures the hardest. https://benchlife.info/runmemtest-4-by-dang-wang-download/
Bonchi
post Jun 1 2021, 02:00 PM

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QUOTE(yimingwuzere @ Jun 1 2021, 12:17 PM)
https://www.tomshardware.com/news/amd-shows...ing-improvement

Possible Zen 3+ (with huge 3D stacked L3 cache) to fight Alder Lake?
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Stacked chips.... Launch prime, load CPU and L3.... gonna be a fire hazard lolol. Could potentially be their "desperate measure" against intel's finally able to get out of 14nm. Maybe alderlake will still be behind. But if intel continue to optimize their 10nm like their 14nm, things will be interesting. The competition finally begins.
Bonchi
post Jun 2 2021, 12:50 AM

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QUOTE(chocobo7779 @ Jun 2 2021, 12:37 AM)
Pretty sure AMD engineers had thought of that, otherwise they won't consider putting such a large cache on the chip itself tongue.gif

On the other hand the fact that AMD can get 15-20% performance gains out of the same chip by adding a large cache is nothing sort of impressive (those performance gains would be only expected from a new microarchitecture) - it would be even more surprising if the tweaked Zen 3 core somehow manages to outperform Alder Lake in gaming biggrin.gif
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From experiencing all the fatal stability and reliability problems first hand, i feel like they dont give much thought on that. Even the 5800x is already overwhelmingly hot for such low powerdraw, cant imagine how much worse it will be by insulating the hot ccx cores with a very hot cache..

I think the only cpu i would be interested is the monolithic cezanne APU.

Wont be surprised if alderlake is behind but since AMD has taken the throne, i stopped being an AMD fan laugh.gif they gave me the impression of being the new intel. I somehow wanna see intel succeed so we can get cheaper high performance cpus.
Bonchi
post Jun 2 2021, 09:13 AM

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QUOTE(yimingwuzere @ Jun 2 2021, 08:42 AM)
I have the 5800X, and to be frank having this chip be the hottest of the lot does make sense. 142W PPT stock only on a single CCD, unlike the 5900X or 5950X spread across two. Not a surprise that the dies on it were probably cherry picked only for high clocks, not high efficiency unlike the 2 CCD ones.

And frankly you don't want to see (insert brand here) succeed unless you're a shareholder, you want both to be neck and neck with each other. Prices will then be very competitive across both brands then.
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When intel succeeds then AMD have to release a product to overtake intel by at least 10% the very next gen as well as taking their reliability problems more seriously. Then intel would need to slash price of current gen and then do the same for their next gen by overtaking amd by 10%.

with this, we will see a very big performance increment and radical new architectures being introduced every gen. Just like back in the days when Nvidia and ATI used to trade blows every generation.

Bonchi
post Jun 3 2021, 08:04 PM

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QUOTE(chocobo7779 @ Jun 3 2021, 02:01 PM)
Interestingly the idea of a large cache on a CPU isn't new - Intel actually did this with the somewhat forgotten i7 5775C, and the performance in some benchmarks is even comparable to a modern day Comet Lake CPU (if the application takes advantage of its larger cache):

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Actually the large cache is why the zen3 is doing so well. zen2 had a split 16+16 cache that's why it's much weaker from the latencies. However when you take the cache advantage away like superPI, 11900K will dapao 5950X like no eyes see because intel do have much higher IPC. Sadly intel ran out of die space to fit large cache, maybe we will see better improvement on 10nm superfin. perhaps the cache stacking by AMD is a future countermeasure incase intel really did nullify the cache size advantage AMD had by going 10nm.
Bonchi
post Jun 3 2021, 10:13 PM

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QUOTE(yimingwuzere @ Jun 3 2021, 09:52 PM)
Yup CPU cache heavily benefits games. Problem with Broadwell is it clocks horribly, hence why it barely appeared on desktops.

In non gaming benchmarks, the large cache benefit isn't well utilized though, potentially making the CPU more expensive than its worth. I suspect we won't see this in Epyc or TR.
Intel has their Foveros project, with a shipping implementation using 1 Ice Lake core, 4 Atom Tremont cores, SOC components and DRAM stitched on top of each other. Granted it's a low power component, but the tiny die sizes of each part is nullified by the high number of layers, it looks a lot more complicated to implement than AMD's.
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actually I wouldnt call it AMD's implementation as it was made by TSMC and AMD just came and use it laugh.gif kinda sad that AMD is taking all the credits. Compared to intel and TSMC who has to spend way more on R&D for the fab processes as compared to chip design.

This post has been edited by Bonchi: Jun 3 2021, 10:14 PM
Bonchi
post Jun 5 2021, 02:39 PM

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QUOTE(JohnLai @ Jun 5 2021, 01:59 PM)
I had been reading stuff about the Infinity Fabric for a while now, but can't find answer to some questions I have.

Infinity Fabric frequency is linked to RAM frequency. In 3950x and 5950x case, assuming IF 1800Mhz and RAM (1800Mhz effective at 3600Mhz), what is the CCD to CCD bandwidth via Infinity Fabric?

I search through the net and all I can find is the CCD to CCD via Infinity Fabric latency information. Nothing about bandwidth?

Edit:
CCD* correction, not CCX.

Edit2:
CCX to CCX within same CCD bandwidth probably L3 cache bandwidth.
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user posted image
Link to CCD have a wider range of ratio instead of 1:1 and 1:2. The Cache solves most of the latency issues.
Bonchi
post Jun 5 2021, 02:54 PM

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QUOTE(paradis3lost @ Jun 5 2021, 02:49 PM)
By tapaw, you mean a slight performance increase unless using much more expensive RAM?
https://www.techpowerup.com/review/intel-co...9-11900k/6.html
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Go see superpi world record. Maximum vs maximum situations. Pretty big lead with much fewer cores.
Bonchi
post Jun 5 2021, 04:34 PM

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QUOTE(paradis3lost @ Jun 5 2021, 03:19 PM)
Under LN2 and basically no power limit, sure.
Under normal conditions, the 11900k takes double the power to slightly outperform the 5950x.
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That's LN2 + max power vs LN2+max power so it is still apples to apples. Speaking of stock on rare occasions that doesnt utilize cache intel does win even on fewer cores. Another occasion altho unfair to compare, AVX512... easily 70% lead doing the same calculations.

It's just facts.. AMD lead is all thanks to that insanely huge cache.
Bonchi
post Jun 5 2021, 06:14 PM

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QUOTE(paradis3lost @ Jun 5 2021, 05:55 PM)
Yes, I understand that the 5950X can be LN2 cooled too. But that does not matter to daily use.

AVX512 isn’t even supported on Zen 3 so I will not comment on that. If you need AVX512, then your only choice is the Intel 11 series. Anyway, you will need a minimum of a 360mm rad to even sustain AVX512 operations on the 11900K and it will be pulling massive amounts of power - 296w according to Anandtech and then dropping to 230w which is an obscene amount of power and cooling required for a mainstream retail CPU.

I can say the same that Intel’s lead in certain workloads is because of higher clock speed and higher power consumption. Clock for clock, and within reasonable power envelope, Intel loses to AMD.
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A win is a win and a loss is a loss. An F1 will trash a top fuel dragster on a circuit and a top fuel dragster will trash an F1 on a quarter mile. Ignoring cylinders, fuel amount and weight. It is what it is.

Anyways temp is subjective. Ryzens are running way hotter than the power it is drawing and has almost zero gap to TJmax meanwhile intel has a higher TJmax. 90C on AMD is not fine but it always do while 90C on intel is perfectly ok, however everyone expect to run these CPUs below 70c.

Anand's temp is recorded on a 15year old cooler to stay consistent with a core2quad. A 280mm aio is more than enough actually... and there's AVX offset.

And when comes to power, i really dont understand, are people that poor to only afford a 400w psu?.. keep comparing performance/watt. Inb4 ironically AMD consumes more power on average due to inefficient boosting behavior.

Not a fan of both, especially when I was an AMD fan before but kena backstabbed so bad by the brand to the point i drop my biaseness and just jump to intel after spending all the money upgrading my AMD rig in these bad times.
Bonchi
post Jun 5 2021, 06:23 PM

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QUOTE(JohnLai @ Jun 5 2021, 05:21 PM)
Perhaps I should rephrase the question.

If the Infinity Fabric frequency is at 1800Mhz, what is the bandwidth (not latency) when the first CCD has to fetch data from second CCD?
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To understand you need to read up on HT link but iinm, you cant really get a direct answer on this. But loosely it's 42gbps here but i remember it's around 32 on ryzens user posted image https://www.techjunkies.nl/2019/10/15/__trashed/

This post has been edited by Bonchi: Jun 5 2021, 06:32 PM
Bonchi
post Jun 5 2021, 06:36 PM

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QUOTE(JohnLai @ Jun 5 2021, 06:32 PM)
42GB/s.
Slide was for original Zen.

Zen 2 doubled the infinity fabric bus width 256 to 512, can I assume Zen 2 and Zen 3 (same IOD as Zen2) have 84GB/s bandwidth? hmm.gif

Make me wonder how AMD is going to deal with the infinity fabric CCD0 to CCD1 communication when DDR5 dual channel bandwidth might surpassed the I.F. 84GB/s. hmm.gif
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Nop, doesnt work like that. Regardless it will still be the achilles heel. It might be running on IF 1:2 with DDR5 which intel will most likely be running the IMC too.. that's why you see the gear2 setting become available.
Bonchi
post Jun 5 2021, 06:58 PM

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QUOTE(JohnLai @ Jun 5 2021, 06:40 PM)
:confused:  Now uncle is getting confused.
https://en.wikichip.org/wiki/amd/infinity_fabric
EDIT:
From wikichip, few pictures are displaying DDR4-2666 (1333Mhz effective for IF at 1:1), then IF bandwidth link is 42.667GB/s.

So, I assume at 1800Mhz I.F. , the link speed would be 57.615GB/s

Since the bus width was doubled on Zen 2 ......perhaps at 1800Mhz I.F. , the link speed would be 115.229GB/s?  hmm.gif
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42 is threadripper quad channel. So ryzen 3rd gen in the link is 32. Theoretically the bus can support way more but there are bottlenecks.

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