QUOTE(Xflkekw @ Apr 20 2021, 12:27 PM)
Short answer yes. you are able to jump between departments although not immediately. Once you are converted from GT to permanent, you are required to stay within that department for a minimum of 1 year.
Unless you are able to provide more details regarding your roles/team. Its hard to elaborate for you what each job entails. My advice is just take up whichever offer that align with your strongest skillset currently. Heres an overview on what skills are usually needed for the major engineering teams in Penang that may help you decide.
Pre-silicon Front-End RTL/Logic Design and Validation (Relevant teams include PCH Front-end team, IPG SIP team, DDG Atom core design and validation team, PSG Custom logic design team) - SystemVerilog/Verilog, Perl, Linux and Shell Scripting.
Pre-silicon Back-End Design and Validation (Relevant teams include PCH Physical/Structural Design team, DDG Atom core SD team, PSG SD team)
- Common VLSI knowledge (Stuff like Static timing analysis, clock tree synthesis, etc) You will be working on stuff like Floorplanning, partitioning, place and route and layout. If you are unfamiliar with these terms, google them. Basic scripting skills (Perl/Python) and Linux.
oh god seems like a long learning curve.
Eventually they sent out WorkDay application as a Functional Validation Engineer.
The team will be under IPG.
Based on what I heard from my Hiring Manager, my team is sandwiched in between Front and Backend.
The job scope is quite new, also not really familiar with, due to the uni and industrial gap.
But again really test out 1 year see is I can sink or float lah.
Since industrial IC field jobs, seems very vast and in depth.
Maybe start low from Validation Engineer, slowly can work up to IC design or not?
Hopefully, Intel Malaysia is inclusive, tolerant, and understanding on the current situations for fresh graduates who don't know their strengths or position in their playing field, and Intel can cultivate a pathway for us and further drive our passion in this field.
Graduate Functional Validation Engineer
Job Description:
Creates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools.
Develops hardware and software collaterals and integrates it with the emulation/FPGA model.
Tests and debugs the emulation/FPGA model and collaterals.
Develop methodology/tool flow for running system tests/SW application/boot OS on emulator.
Experience or knowledge in FPGA design and simulation in VHDL/Verilog; knowledge in standard emulator
flow (Cadence Palladium, Synopsys ZeBu or Mentor Veloce) will be a plus.
Qualifications:
Electronic, Electrical, Computer Engineering or similar engineering degree
Digital design
Combinational, Synchronous (state machines), Asynchronous
Hardware Description Languages (Verilog, System Verilog or VHDL)
Programming languages (C, C++, Python)
Ability to self-organize and prioritize work.
Business group:
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our
customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our
core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles
will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem
Solving. We are a fearless organization transforming IP development.
This post has been edited by iSean: Apr 21 2021, 12:29 AM 
Apr 20 2021, 12:33 PM
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