Firstly, Thank you for replying.

The offer is at Job Grade 6, ill be coming from Philippines.

If ever we will stay at Kulim area, what are the available local transportation mode (ie,bus) going in and out of the office? do i need to use the taxi everyday? this might be too expensive. Does Intel cover the transportation cost?

Hey Chipz do you have the Intel Shuttle Bus Service route?
I'm planning to stay around D-Piazza's area. I'm not sure will it reach me or not.

So far survey:
- D-Piazza's Condo
- Arena
- Elit Heights
- Mahsuri Square

So far I heard it is not operating 

  oh god seems like a long learning curve.
Eventually they sent out WorkDay application as a Functional Validation Engineer.
The team will be under IPG.

Based on what I heard from my Hiring Manager, my team is sandwiched in between Front and Backend.
The job scope is quite new, also not really familiar with, due to the uni and industrial gap.

But again really test out 1 year see is I can sink or float lah.

Since industrial IC field jobs, seems very vast and in depth.
Maybe start low from Validation Engineer, slowly can work up to IC design or not?   
Hopefully, Intel Malaysia is inclusive, tolerant, and understanding on the current situations for fresh graduates who don't know their strengths or position in their playing field, and Intel can cultivate a pathway for us and further drive our passion in this field. 

Graduate Functional Validation Engineer
Job Description:
􀀀 Creates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools.
􀀀 Develops hardware and software collaterals and integrates it with the emulation/FPGA model.
􀀀 Tests and debugs the emulation/FPGA model and collaterals.
Develop methodology/tool flow for running system tests/SW application/boot OS on emulator.
Experience or knowledge in FPGA design and simulation in VHDL/Verilog; knowledge in standard emulator
flow (Cadence Palladium, Synopsys ZeBu or Mentor Veloce) will be a plus.

Qualifications:
Electronic, Electrical, Computer Engineering or similar engineering degree
􀀀 Digital design
􀀀 Combinational, Synchronous (state machines), Asynchronous
􀀀 Hardware Description Languages (Verilog, System Verilog or VHDL)
􀀀 Programming languages (C, C++, Python)
􀀀 Ability to self-organize and prioritize work.

Business group:
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our
customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our
core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles
will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem
Solving. We are a fearless organization transforming IP development.