So it's more of an ease of use thing than a performance thing right? Because right now i'm doing a full custom design and layout of an ALU and we can pretty much create whatever "gates" we want to improve performance or other characteristics of the circuit. Process tech is TSMC 0.18 micron SCMOS (5 metal layers).

So my impression is that when performance is crucial, full custom gates are used. Is this correct? I'm pretty sure intel/AMD/Nvidia/ATI don't use only NAND gates for their ASICs

phew, the thread grew two whole pages overnight.

Designing with NAND gates is a higher level of abstraction and usually gives you a ballpark figure of how many transistors are going into your final circuit. Furthermore, a NAND gate's electrical properties; fan-in, fan-out, propagation time, etc. are known quantities. If you go all out full custom, be prepared to run test after test to make sure you don't suddenly get an oscillator instead of an ALU (an exaggeration, I know ).

Wow, designing logic gates using transistors ^^;; I just use the 74 series chips to solve my problems. Approaching final year EnE in Uniten. Anyone got ideas for a final year project? I have 2 in mind, hear me out
1. Maglev - Using magnets to levitate the train and an electromagnetic propulsion system
2. Flying Car - Using the same propulsion system, only vertically placed and much stronger. Problem is, power consumption will be tremendously high and I am not sure if it will work.

What you guys think? What did you all do for your final year project?

I tot MMU got offer VHDL? Under Digital Computer Design during Delta 3rd Trimester.

I am currently Computer Engineering 3rd year student. Dun really understand about those logic stuffs you all discuss about. Are they DSP? Cos I haven take DSP. In a few sem time will be. If you all discuss about microcontroller, maybe I can be of some help.

Btw, in MMU, our courses of Computer Engineering and EE are quite similar. We are called Electronics majoring in CE. WE have about only 5-8 subjects that are different. BUt I agree that subjects like Power Electronics, Digital Comm and Analog Comm are seems quite irrelevant. Don't really like those subjects.

This post has been edited by witchhunter: Oct 14 2005, 11:50 AM

MMU have SILVACO or not? CADENCE?

Yes, test at every step, verilog to get the logic right, then transistor level to optimize the circuit, then test again to compare with the verilog, then layout level, test gate layout, then blocks, then the entire thing. Using Cadence tools, pretty neat. It's all nicely integrated together.

Fishy you lucky SOB.. all i had was a 0.35um CMOS fab in our labs..

Computer & Communication Engineering @ UKM 3rd Year

Reporting!

This is the 2nd year we're using 0.18um layout. Our fab is not that advanced i think. We're just doing advanced simulations on the final layout. We're using TSMC SCMOS18 design rules, so basically if we wanted to then we could send the final design to TSMC and get it manufactured.

Mentor graphics(HDL designer) are different, their more on graphical implementation isntead of writing codes(though you still need to write a bit for certain systems)
yes, i think you can use the conventional way to calculate delays(not sure which EDA tools will calculate it for you, never use those b4)
in FPGA, it has slightly different delays, it's not the same as delays in real devices
VHDL has 2 type, behavioral and structural modelling
there's no such universal preference on which is better, it depends on preference, for me if u ask me to design a circuit(let's say a Booth Multiplier) which i need to learn from scratch in a few months(make it 1-2 months), then i'll use behavioral
but if i have the actual data schematics with me since the start but not too sure how it really behaves, then i'll use structural
actually wat i mean by coding style is that how and where do you update your output/buffers. sometimes in certain codings, though it's right, but if you update your output/buffer slightly later(let's assume we update it after the process section), then delay might occur
but if you update it inside the process statements, then it'll have less delay
there are other problems too, but this will naturally be known to you when you encounter it

p/s: in writing port map section, i suggest you read how to use GENERATE statements, useful in writing port maps

currently need to design a Viberti Decoder for my finals
finding hard time to get it's algorithm

DSP? nah......DSP is even worse.....with all those Discrete Signal Processing theories, it'll be much difficult IMO, but of course, the implementation part is slightly easier(coz all you need is Simulink to do the donkey job)

so basically you all only develop till the mask level right? but kinda nice for your uni to teach verilog. i need to learn by myself

1st year Computer Engineering students here from UTM

X10 Freedom, thanx for the info



Digital Computer Design has VHDL, but the lecturer didnt really teach, js go through damn quickly. He teaches mainly on the gate level design.

Power Electronics is important, bcoz u need the knowledge to construct power supply unit. Well, Analog Comm, Digital Comm, Intro to power system, Intro to machine and stuff like that is really useless. I hope they can include stuff like IC design and transistor level optimization like what others have told me here.

MMU is using Altera software. I'm not sure about silvaco.



No thanx to DSP, I'm scared of Fourier and other wave equations

This post has been edited by charge-n-go: Oct 14 2005, 06:18 PM

actually you can't say Digital Comm is not important vice versa
i used to thought why do i have to study that when all i want to do in the future is just IC designer, but now, i need to design a decoder IC that is used for decoding signals from CDMA's, Satelite transimissions etc
they teach you all these so that in your final year, you're more prepare to do more things and not limited to certain topics(as you don't always get the topic you want)
anyways, transistor optimizations is a headache(all those formulas like IV curve etc and not so friendly PSPICE programs)
normally people have EDA tool that does the donkey job(people are always rushing againts time that's why they rather splash cash on those expensive EDA tools)

Actually in MMU, we took 'data communication' subject for all the CDMA, transmission (in binary), compression technique and stuff like that. Digital Comm basically is an extension where we learn about how the digital signal is represented in Fourier and how to convert sinc to square function and etc. Then we need to design some filter to select the correct bandwidth, and some stuff like tat, cant really remember liao
Well, if we cant get the FYP topic (like me), I'm proposing my own one, so i guess tat's not an issue

Hi,
Still a secondary school student here wanted to know more abt Computer Engineering.

What is the difference between Software Engineering, Electronics and this???
Plz tell me so I know what to choose in future.

Thx.

Based on what you all have been discussing, can anyone from senior from MMU tell me which subject this is under? Especially the Discrete Signal Processing. Cos I have never touched this field despite being three years in MMU

Damn, im still stuck with logic gates, in BM...Get logik DAN, TAK, ATAU, litar penambah, penolak. F5 physics.
Istill dont understand the adder circuit, and SPM is coming...Got the flip-flop circuit down though.

I'm taking Btech computer system and networking. It's very tough
Dun feel like quiting either cuz oledi halfway

They didn't really teach verilog, the intro class was next to useless. Mostly i had to learn it by myself. Last semester i had a class where i had to write 1000 lines of verilog every 2 weeks so i think i'm a bit better now