QUOTE(dblooi @ May 17 2008, 02:36 AM)
I think there are misconceptions there.
1.The High-K gate dielectric is mainly design for gate leakage control.
( of couse, no doubt amount of transistors are increased as well )
How far the processor can go, it's more likely depend transistor characteristic, amount of transistors, quality and purity of the wafer used etc.
In those old days, Pentium 4s are screw up big time in term of power consumption control, but they have no problem to hit 8GHz
Agreed with that point AMD processors hardly can break through 4GHz region, eventhough they are moving into 45nm fabrication technology
2. Best B3 has no problem to do 3.5GHz above
http://www.xtremesystems.org/forums/showthread.php?t=1830253. I would say that 6MB L3 cache can never on par with 6MB unified L2 cache
4. For F3, 3.6GHz is achievable with air cooling, in the case ambient temperature must be low.
Bro @meno has a mighty F3 gem
FYI, one of the top 10 guy actually bench 3.9GHz with air cooler
eldera from beijing , but he bench it in winter season.
The CPU-Z validation thingy actually is not hard to do so.
It depends on how good your cooling + how well you can play with clockgen / setfsb + how fast you can save the validation file
1. Actually, not entirely correct. Leakage current is what causes signal deteoriation, I read a detailed review on Penryn on how the overclocking limit of a processor can be determined based on its power consumption versus clockspeed graph (lost the link, looking for it). At a certain point, power consumption shoots up rapidly when clockspeed is increased (voltages kept to minimum required for each clockspeed). At that point, the processor is rapidly approaching its overclock limit, regardless of what voltage is pumped in and how much cooling is used.
2. Looks like I'm a little behind time on Agena B3..my bad
3. Probably true. More said below.
4. That 3.9Ghz on air is a true gem, one in a million. Even in winter, you're not likely to get subzero temps on the processor, probably equal to iced WC. Actually I was refering to at least benchmark stable, not just CPU-Z validation. So above 3.6Ghz and still stable is quite a challenge, considering how much @meno would not like to risk frying his chip.
QUOTE(AMDAthlon @ May 17 2008, 09:55 AM)
I think its because the AMD 64 architechture are too big.I THINK only.Thus only around 512KB/1MB L2 Cache can be integrated into the cores.
I think you've stumbled on something I didn't think about. AMD doesn't use a unified L2 cache, and cache must be close to the cores for high speed interconnects (long connections suffer from inductance and capcitance, plus interference from nearby circuits). With 4 cores, its not possible to place a large, fast cache attached to each core because each core will take up too much space and the die will be too big (Agena is the biggest single CPU die for desktops). A shared cache in a processor is limited in speed because connections to the cores will run long, and cannot be stable at high frequencies.
Which also raises another question. Nehalem will be native quad-core (4 cores on a die). That means that they will also have the same problem regarding the shared cache. Should be interesting to see how they solve it.
QUOTE(gamers maniac @ May 18 2008, 02:36 PM)
the destroyer sure got all the credit. hybrid sli, 3 way sli, 4 pci-e 16x gen2.0, and etc. plus paired wif quantum bios, this board is on par or above blackops IMO. but lacking of NB variety cooler that black ops have
. nowadays FOXCONN starting to look into extreme user market
Destroyer punya grandpapa here already..AMD's own BlackOps..
Quantum Force Dreadnought 
May 18 2008, 03:11 PM
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price..
aiyarkk..miss that one..TQ.
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