my setting @ 240Mhz
bios 623-3
DRAM Configuration Settings:
DRAM Frequency Set............................ - 200
Command Per Clock (CPC)....................... - Enable
CAS Latency Control (Tcl)..................... - 2.5 Bus Clocks
RAS# to CAS# delay (Trcd)..................... - 03 Bus Clocks
Min RAS# active time (Tras)................... - 05 Bus Clocks
Row precharge time (Trp)...................... - 02 Bus Clocks
Row Cycle time (Trc).......................... - 7 Bus Clocks
Row refresh cyc time (Trfc)................... - 12 Bus Clocks
Row to Row delay (Trrd)....................... - 02 Bus Clocks
Write recovery time (Twr)..................... - 02 Bus Clocks
Write to Read delay (Twtr).................... - 02 Bus Clocks
Read to Write delay (Trwt).................... - 02 Bus Clocks
Refresh Period (Tref)......................... - auto Cycles
Write CAS Latency (Twcl)...................... - Auto
DRAM Bank Interleave.......................... - Enabled
DQS Skew Control.............................. - Auto
DQS Skew Value................................ - 0
DRAM Drive Strength........................... - Level 8
DRAM Data Drive Strength...................... - Level 3
Max Async Latency.......................... - 08.0 Nano Seconds
DRAM Response Time............................ - Normal
Read Preamble Time............................ - 05.0 Nano Seconds
IdleCycle Limit............................... - 16 Cycles
Dynamic Counter............................... - Disable
R/W Queue Bypass.............................. - 16 x
Bypass Max.................................... - 07 x
32 Byte Granularity........................... - Disable(4 Bursts)
Aeneon 1GB DDR 400 Discussion Thread, Owner Please share
Jan 16 2007, 11:59 PM
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