Apr 24 2007, 04:54 PM
QUOTE(linux11 @ Apr 24 2007, 02:35 PM)
Intel will still be stuck with FSB in 2008. 
Personally looking forward to HT3, which i think is a much more elegant design.
No. IIRC, Intel will be implementing CSI (Common System Interface) on their upcoming Nehalem architecture by 2008.Personally looking forward to HT3, which i think is a much more elegant design.
Hmm....Eaglelake. I thought it is formerly known as Bearlake.
Anyway, PCI-E 2.0 with 2*16 layout. That means a maximum of 32 lanes per connection which translates to 16GB/s of bidirectional bandwidth?
This post has been edited by mystical zero: Apr 24 2007, 04:58 PM
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