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 Intel, AMD what next?, 2008 Roadmap.....

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charge-n-go
post May 7 2007, 10:46 AM

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You guys will be surprised after seeing the cache hierachy and size of L2 in Nehalem. It shrinks.
charge-n-go
post May 7 2007, 11:27 AM

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QUOTE(afosz @ May 7 2007, 10:46 AM)
What does cache do or help anyway? I mean like it is hard for me to explain to my bro that A64 X2 3600+ with 256x2 is different with A64 3000+ with 512K. Although 256x2 is 512 mathematically tongue.gif because he finds it is similar, no upgrade at all.

So higher cache is better or lower is better? Or just ignore about the cache thing?
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2x256K is 256K L2 per core. In A64 3000+, the only core has dedicated 512K L2.
In single threaded software, 3000+ might work faster due to larger L2.

QUOTE(ikanayam @ May 7 2007, 11:01 AM)
Hm... interesting, if it has a L3, then it makes sense that they will shrink the L2 and make it faster, or possibly even make it non unified L2 for latency/bandwidth & a large unified L3 for coverage.
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This sounds like Barcelona cache hierachy tongue.gif
I've read that Barcelona design the cache this way to increase performance in Virtualization, instead of going for shared L2. Since we are heading towards VT world pretty soon, you can roughly guess the design trend.

 

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