QUOTE(raydenex @ Sep 23 2017, 01:10 AM)
Apparently the cold boot issue on C6H has a fix also but they will only include it in the next BIOS version that will house AGESA 1007. Clearly not the recent BIOS 1602. C6E also has cold boot occurence?
For those settings that passed HyperPi or HCl MemTest, no cold boot issue so far with C6E.
Try playing more with manual settings: voltages especially VDIMM vSOC, RAM timings etc.
Also, you might try those preset RAM OC profiles provided in the UEFI.
Run HyperPi or HCl MemTest to ensure stability.
Here's my stable settings for the TridentZ RGB @ DDR4-3200 14-14-14-14-28-1T
» Click to show Spoiler - click again to hide... «
Ai Overclock Tuner [Manual]
BCLK Frequency [100.0000]
BCLK_Divider [Auto]
Custom CPU Core Ratio [Auto]
> CPU Core Ratio [39.00]
Performance Bias [Auto]
Memory Frequency [DDR4-3200MHz]
Core Performance Boost [Enabled]
SMT Mode [Enabled]
EPU Power Saving Mode [Disabled]
TPU [Keep Current Settings]
CPU Core Voltage [Offset mode]
CPU Offset Mode Sign [+]
- CPU Core Voltage Offset [0.20000]
CPU SOC Voltage [Manual mode]
- VDDSOC Voltage Override [1.05000]
DRAM Voltage [1.37000]
1.8V PLL Voltage [Auto]
1.05V SB Voltage [Auto]
Target TDP [Auto]
TRC_EOM [Auto]
TRTP_EOM [Auto]
TRRS_S_EOM [Auto]
TRRS_L_EOM [Auto]
TWTR_EOM [Auto]
TWTR_L_EOM [Auto]
TWCL_EOM [Auto]
TWR_EOM [Auto]
TFAW_EOM [Auto]
TRCT_EOM [Auto]
TREFI_EOM [Auto]
TRDRD_DD_EOM [Auto]
TRDRD_SD_EOM [Auto]
TRDRD_SC_EOM [Auto]
TRDRD_SCDLR_EOM [Auto]
TRDRD_SCL_EOM [Auto]
TWRWR_DD_EOM [Auto]
TWRWR_SD_EOM [Auto]
TWRWR_SC_EOM [Auto]
TWRWR_SCDLR_EOM [Auto]
TWRWR_SCL_EOM [Auto]
TWRRD_EOM [Auto]
TRDWR_EOM [Auto]
TWRRD_SCDLR_EOM [Auto]
Mem Over Clock Fail Count [Auto]
DRAM CAS# Latency [14]
DRAM RAS# to CAS# Read Delay [14]
DRAM RAS# to CAS# Write Delay [14]
DRAM RAS# PRE Time [14]
DRAM RAS# ACT Time [28]
Trc_SM [50]
TrrdS_SM [6]
TrrdL_SM [9]
Tfaw_SM [36]
TwtrS_SM [4]
TwtrL_SM [12]
Twr_SM [10]
Trcpage_SM [Auto]
TrdrdScl_SM [2]
TwrwrScl_SM [2]
Trfc_SM [307]
Trfc2_SM [192]
Trfc4_SM [Auto]
Tcwl_SM [14]
Trtp_SM [8]
Trdwr_SM [8]
Twrrd_SM [3]
TwrwrSc_SM [1]
TwrwrSd_SM [7]
TwrwrDd_SM [7]
TrdrdSc_SM [1]
TrdrdSd_SM [5]
TrdrdDd_SM [5]
Tcke_SM [8]
ProcODT_SM [60 ohm]
Cmd2T [1T]
Gear Down Mode [Enabled]
Power Down Enable [Disabled]
RttNom [Auto]
RttWr [Auto]
RttPark [Auto]
MemAddrCmdSetup_SM [Auto]
MemCsOdtSetup_SM [Auto]
MemCkeSetup_SM [Auto]
MemCadBusClkDrvStren_SM [Auto]
MemCadBusAddrCmdDrvStren_SM [Auto]
MemCadBusCsOdtDrvStren_SM [Auto]
MemCadBusCkeDrvStren_SM [Auto]
VTTDDR Voltage [Auto]
VPP_MEM Voltage [Auto]
DRAM CTRL REF Voltage on CHA [Auto]
DRAM CTRL REF Voltage on CHB [Auto]
VDDP Voltage [Auto]
VDDP Standby Voltage [Auto]
1.8V Standby Voltage [Auto]
CPU 3.3v AUX [Auto]
2.5V SB Voltage [Auto]
DRAM R1 Tune [Auto]
DRAM R2 Tune [Auto]
DRAM R3 Tune [Auto]
DRAM R4 Tune [Auto]
PCIE Tune R1 [Auto]
PCIE Tune R2 [Auto]
PCIE Tune R3 [Auto]
PLL Tune R1 [Auto]
PLL reference voltage [Auto]
T Offset [Auto]
Sense MI Skew [Auto]
Sense MI Offset [Auto]
Promontory presence [Auto]
Clock Amplitude [Auto]
CPU Load-line Calibration [Level 1]
CPU Current Capability [Auto]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Disabled]
Active Frequency Mode [Disabled]
CPU Power Duty Control [Extreme]
CPU Power Phase Control [Extreme]
CPU Power Thermal Control [120]
VDDSOC Load-line Calibration [Auto]
VDDSOC Current Capability [Auto]
VDDSOC Switching Frequency [Auto]
VDDSOC Phase Control [Auto]
DRAM Current Capability [100%]
DRAM Power Phase Control [Extreme]
DRAM Switching Frequency [Auto]
DRAM VBoot Voltage [Auto]
This post has been edited by owikh84: Sep 23 2017, 09:28 AM