QUOTE(joytest @ Sep 11 2013, 03:14 PM)
Search term is cci or cci400 it came out about 2 months ago I think. Exynos 5410 cci.
A couple of articles on sammobile. I posted also in v24 or v25 of note 2 thread.
Ok found the implementation:-A couple of articles on sammobile. I posted also in v24 or v25 of note 2 thread.
QUOTE
The next logical step would be a quad-core version, which we sort of got with the Exynos 5410 - or as it's more commonly known: Exynos 5 Octa. This part features four ARM Cortex A15 cores running at up to 1.6GHz and four ARM Cortex A7 cores running at up to 1.2GHz in a configuration ARM calls big.LITTLE. The specific implementation of big.LITTLE on Exynos 5410 is known as Cluster Migration; either the four Cortex A15 cores or four Cortex A7 cores can be active, but not both and not an arbitrary combination of cores from each island. They're either all on or all off. This is by far the easiest to implement from a software perspective, but is obviously the less interesting option from a heterogeneous SMP perspective. I'll be talking more about this in an upcoming ARM piece.
On the graphics front, Samsung moved to Imagination Technologies for the Exynos 5410 - implementing a PowerVR SGX 544MP3 setup. The Exynos 5410 saw limited use, appearing in some international versions of the Galaxy S 4 and nothing else. Part of the problem with the design was a broken implementation of the CCI-400 coherent bus interface that connect the two CPU islands to the rest of the SoC. In the case of the 5410, the bus was functional but coherency was broken and manually disabled on the Galaxy S 4. The implications are serious from a power consumption (and performance) standpoint. With all caches being flushed out to main memory upon a switch between CPU islands. Neither ARM nor Samsung LSI will talk about the bug publicly, and Samsung didn't fess up to the problem at first either - leaving end users to discover it on their own.
On the graphics front, Samsung moved to Imagination Technologies for the Exynos 5410 - implementing a PowerVR SGX 544MP3 setup. The Exynos 5410 saw limited use, appearing in some international versions of the Galaxy S 4 and nothing else. Part of the problem with the design was a broken implementation of the CCI-400 coherent bus interface that connect the two CPU islands to the rest of the SoC. In the case of the 5410, the bus was functional but coherency was broken and manually disabled on the Galaxy S 4. The implications are serious from a power consumption (and performance) standpoint. With all caches being flushed out to main memory upon a switch between CPU islands. Neither ARM nor Samsung LSI will talk about the bug publicly, and Samsung didn't fess up to the problem at first either - leaving end users to discover it on their own.
And its a bug.
Samsung S4 Exynos = 5410 - got bug
Note 3 Exynos = 5420 - fix bug. Can turn on all cores.
Now I know why S4 Exynos so cheap. Its chipset got bug one ler.
Sep 11 2013, 03:21 PM

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