QUOTE(IwanAGP @ Jul 29 2013, 10:53 PM)
Erm... As they shrink down a transistor (microarchitecture), reducing the length of the gate, the leakage is getting more and more serious. I remember I read before that 28nm is about the limit before the leakage gone too high.
That also explains why Intel started using FinFet for their Ivy bridge at 22nm and in Haswell, 22nm too. Reduced leakage!!
It actually not "a bit", it affects a lot. Else they will just keep shrinking without new tech. This explains why they need new architecture to keep up with the increase in performance and to keep leakage/power consumption low at the same time.
no idea. That also explains why Intel started using FinFet for their Ivy bridge at 22nm and in Haswell, 22nm too. Reduced leakage!!
It actually not "a bit", it affects a lot. Else they will just keep shrinking without new tech. This explains why they need new architecture to keep up with the increase in performance and to keep leakage/power consumption low at the same time.
i dunno about those haswell and ivy bridge models difference aso. i look and try to differentiate im like
Jul 30 2013, 12:33 AM

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