AMD now is tight, and I mean very tight on resources.

And they have to compete against two, independent giant, nVidia and Intel, both of them having bigger budget than AMD.

It's gonna be very tough...

I wonder if they had consider this situation when they decided to buy ATi. Without the merge, I think both company would be doing much better then they are now. ATi was very strong before they got pulled into this situation with AMD. I mean, their long term plan may be beneficial but for now, it seems like AMD doesn't have the budget for such thing yet. IMO, they aren't financially prepared for it.

If I'm not mistaken, when AMD acquire ATi, they cut down on the number of staff. Of course I don't know how the distribute their R&D spendings all, but I guess had they both remained independent companies, they could each focus on their own GPU / CPU with their own resources.

Phenom is not compatible with socket 939.

Not too sure with AM2 but I read somewhere that with AM2, the CPU won't be able to individually throttle the speed and vcore of each individual core..... 

AMD wont go bankrupt one. The OEM and ODM wont want to see a scenario where Intel is the only player on the market.
The worst is we see AMD being taken over by another investment group or large company.

AMD has been losing money for years before Athlon and AMD64 comes along

So meaning that if AMD was taken over, it would literally spell the end of AMD processors as we know it?

And does that also mean that intel does not want AMD to go bust as well?

Pls enlighten this noob, ikanayam 

Intel is evil,amd is trying everything they can to prevent them from monopoly

^ wait but does this means if no amd then no x86?

At 1 point in time they did but they couldn't do it economically well enough (read: lose money) so they gave up.
x86 is pretty much an Intel vs AMD thing with VIA being a spectator. IBM prefers to just do research and license the IP.

The one who has the performance crown dictates the pricing game: Intel is literally choking AMD to death by forcing them to sell their procs at a loss. HUge die + bad yields + poor performance = loss.

Went for the spider launch, i was seriously as impressed as Voltaire on his deathbed talking to a priest. Phenom simply isn't the magic bullet to kill Intel, and with it's shitty yields, how can AMD even beat them on cost?

The PR dude said that their yields were very good and that they were shipping in bulk. Then i asked, when can we expect in say the hands of customers, he said late January.

Logically if you're shipping enough chips, you'd be able to satisfy both OEM and Retail markets at the same time as Intel has done, but i guess this isn't the case if it's going to reach so late.

Anyways, anyone got any info on their workaround for the TLB issues, fish asserts that there's 10 percent perf hit, i'm very much inclined to believe, but sources are scarce.

I thought the errata could cause the system to hang at speeds > 2.4 ?

the key to win here is price. thats how amd always win.

Large cache would be a means, IMC would be the end. Both would be overlapping each other in improvements, so I'm not betting too much here (except in real-world 4P+++ server tests, where Opteron Barcelona is competitive since Tigerton is still not the killer we wanted to see, where Bloomfield will kill)

C2D/Qs have already pushed the FSB to hell and back, Nehalem wouldn't have that much cache, so basically it's not there where performance rules. Getting Hyperthreading "2.0" itself done would alread be quite a lot of win- Fishy says it'd be more substansial than the Northwood/Prescott flop. That, and negating off whatever performance hits C2D/C2Q had in 64-bit execution (due to Macro-ops not running?), getting the execution stages to be even wider, etc.

I won't call it leapfrog in say, SuperPi or single threaded performance (I don't even reckon the difference will be more than Athlon X2 -> Core 2 Duo clock for clock percentage wise), but it would be more like a big improvement everywhere else, and much more in threaded core utilization.

I can't disagree with you on that but one has to consider the fact what with Intel forging ahead with larger cache at L2 instead of going L3, and at the same time developing tech which negates or reduces the latency associated with large cache, it's hard not to be imginative with what may possibly be achievable once implementation of integration is achieved and if it's inline with what the goals of HTT 2.0 are, we may see greater bandwidth being made available altho by right current microproc designs being churned out by Intel aren't that memory hungry (Correct me if I'm wrong, getting forgetful nowadays). And with that, it's possible a substantial if not leapfrogging evolution of micro-p architecture at consumer market level. As for Northwood, I can't personally agree it's a failure since it did serve it's purpose well eventhough it close to it's design limitation. Prescott and subsequently Cedar Mill should be the one's to be considered the real flops as Intel chose to prolong a design which was fast running into a performance-per-watt wall. IINM, Cedar Mill's heat density scaled to the point that at an equivalent one sqaure meter, it generated enough waste heat equivalent to a small power plant (Thanks to ikanayam for pointing out that fact last time).

As for Bloomfield, from what I heard from the grapevine, that seems to be a stop-gap measure although I can't get nor divulge any further details since it's unsubstantiated and/or it's based on the trust as friends

Was talking on Northwood at Hyperthreading level.
Its HTT implementation was utterly useless.

Nehalem could be designed with H-T in mind, and that's where I'm betting on Intel for that boost AMD can't have in synthetics (after all, synthetics are EVERYTHING in CPUs, no way bypassing them in performance assessments)

Bloomfield could be a stopgap, but that would be counting on 32nm to be implemented quickly and to get Sandy Bay out fast. Which would be rather ideal as these chips are huge.

Mind to explain more?

The description is pretty vague. Under a highly specific and detailed set of conditions, an internal resource livelock may occur
between a TLB reload and other cached operations.
I don't see how this can affect virtualization? Unless u got some info that we dont?

And the performance hit 5% -10% is cause by this errata? But this bug says it caused a livelock which means ur system will hang??

I think you are looking at the wrong errata. Errata 254 suit more the official statement by AMD.
"The Translation Lookaside Buffer (TLB) errata is an L3 protocol issue causing a system hang when running certain client workload applications independent of platform. AMD is immediately introducing an updated BIOS which will correct the TLB errata".

This problem was found during speed-binning the B2 revision processors, and this was the cause for the Phenom FX 3.0 GHz delay. It turns out that some CPUs running at 2.4 GHz or above in some benchmarking combinations, while all four cores are running at 100% load, can cause a system freeze.
This bug delayed the AMD parts to Jan next year. This bug prob wont cause a performance hit but instead will cause the system to hang.
It seems to me that AMD is downplaying the seriousness of this bug since it can cause the delay of higher than 2.4 Ghz speeed bin.
Intel can get away with these kinda bugs with a patch update, but AMD still have to fix in a new stepping

i love the phenom cause its using the HT Link unlike the Intel quad processors are still using FSB....

Hie Guys...
AMD have a huge dissapointment to us as an end user, but as AMD Fans, I will stand by them, they need our support... They are lack of fund for their R&D to enhance their technology... As you guys know that the market place for Intel is larger, thus the profit for them is higher and they can do more on their R&D, in the other hand AMD is lack of fund and they can't do anything but to delay to perfect their processor... IMO, AMD technology is better than Intel, just that they are lack of money..

really hard to understand, AMD already admits their processor still cant outperform current Intel processor by adjusting the price accordingly which is reasonable i think, why still arguing who got the best processor. We juz need a good performance/value processor....

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Added on December 21, 2007, 3:37 am

Anyway currently i think they are equally in term of technology. juz which one first, Intel choose to go for 45nm while AMD gone to native quad. Soon, it will be Intel go for native quad and AMD go for 45nm.

for consumer like us maybe not really realise wat native quad can do, i juz finish my research on multicore for my assignment, licensing will be a prob for MCM processor like core 2 quad, the charge for software is double as many company accept a MCM processor as 2 processor instead of 1 for native quad, therefore licensing cost for business is considerably high. the performance for native quad will outperform non-native in a multiprocessor system.

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Added on December 30, 2007, 2:12 pm

thats same goes to intel as it wont go to native till tat period.

check here
i lost other links only found this after check back history, maybe some say wiki is not trust able but the point for the licensing part makes sense, if they juz pack more chip on one module the company can saves millions for license, they willing to pay tat incentives to processor maker for tat saving.

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Added on December 30, 2007, 7:32 pmper core performance is better but the links between cores broke when it is non-native, they need to travel from die-die instead and power consumption is higher as well. u pay more for tat core performance as well as electricity for long term. for us maybe few bucks of electricity doesnt matter but try to think on the point of view for business, they can save a lot for electricity per month basis.

How much is it just produce an unlock multiplier cpu compare to locked cpu?