Jul 29 2006, 10:38 AM
Check the PENTIUM line VS CORE Line from intel forum yesterday
Found that if the instruction is short ... Folding really Benefit allot from CONROE
QUOTE
Intel PENTIUM 4
-3 Pipeline
-31 stages
-Cache per core (even with PD seires)
Since the pipeline is lengthy ... it can do 31 operations in one Pipeline hence increase the efficientcy of Calculation BIG Instruction ... However it utilize the cache per core the two cache memory do not share and this brings imposible in combining two instruction in one memory line
Intel CORE
-4 Pipeline
-18 stages
- share caches enable ( in multi core series)
Since the pipeline is short ... it can only do 18 operations in one Pipeline But i had four pipeline hence increase the efficientcy of Calculation many SMALL Instruction ... it utilize the Share cache per core the two cache memory do share and this brings posible in combining two instruction in one memory line with internal AI control ... similiar instruction will be processed together in one pipeline and do not repeat in another pipeline Hence reduce the instruction that a Processor need to be processed
-3 Pipeline
-31 stages
-Cache per core (even with PD seires)
Since the pipeline is lengthy ... it can do 31 operations in one Pipeline hence increase the efficientcy of Calculation BIG Instruction ... However it utilize the cache per core
the two cache memory do not share and this brings imposible in combining two instruction in one memory line Intel CORE
-4 Pipeline
-18 stages
- share caches enable ( in multi core series)
Since the pipeline is short ... it can only do 18 operations in one Pipeline But i had four pipeline hence increase the efficientcy of Calculation many SMALL Instruction ... it utilize the Share cache per core
the two cache memory do share and this brings posible in combining two instruction in one memory line with internal AI control ... similiar instruction will be processed together in one pipeline and do not repeat in another pipeline Hence reduce the instruction that a Processor need to be processed Haha .. see the picture ? if and only if the instruction in folding is manny and small folding really benifit allot in conroe
But still the clock cycle of conroe is way too little but with reducing instruction ... the CPU can process faster ... ah where should i go ...
By simple calculation ... if compare P4 process 3 instruction per clock at OCed 5GHz and CORE process 4 instruction per clock at OCed 3GHz ....
P4 had 5G X 3 = 15G instruction
CORE had 3G X 4 = 12G instruction
Since CORE reduced ammount of similiar instruction needed to be processed with AI .... hence it can overtake P4 easily and produce less heat
Anyway .. still can't beat the GPU of ati x1900XTX which had 16 pipelines
Ah .. waiting for quard core to come out and i can buy
because it had 16 pipelines
( of course 4 pipelines X 4 Cores and + share cache ... can combine already ... haha )This post has been edited by RIGmaster: Jul 29 2006, 10:40 AM
Quote
0.0123sec
0.81
5 queries
GZIP Disabled