For memory, may be after 64 bit addressing is no enough...

Intel® architecture powers datacenters and personal computers around the world. Since its introduction by Intel® in 1978, the architecture has continuously evolved to take advantage of emerging workloads and the relentless pace of Moore’s law. The original instruction set defined only eight 16-bit general-purpose registers, which over the years were doubled in number and quadrupled in size. A large set of vector registers was added, and most recently Intel® AMX introduced two-dimensional matrix registers, providing a big jump in AI performance.1

Today, we are introducing the next major step in the evolution of Intel® architecture. Intel® Advanced Performance Extensions (Intel® APX) expands the entire x86 instruction set with access to more registers and adds various new features that improve general-purpose performance. The extensions are designed to provide efficient performance gains across a variety of workloads – without significantly increasing silicon area or power consumption of the core.

Intel® APX doubles the number of general-purpose registers (GPRs) from 16 to 32. This allows the compiler to keep more values in registers; as a result, APX-compiled code contains 10% fewer loads and more than 20% fewer stores than the same code compiled for an Intel® 64 baseline.2 Register accesses are not only faster, but they also consume significantly less dynamic power than complex load and store operations

each bit extra is twice the capacity, i wonder when we will move towards 128 bit.

40 bit address can handle up to 1 TB (some system is 48 bit up to 256 TB), 

40 bit address can handle up to 1 TB (some system is 48 bit up to 256 TB),