QUOTE(c38y50y70 @ Apr 16 2007, 10:05 PM)
Actually AMD can make the DDR2 version using existing 939 socket because 30 over pins on the older K8 are reserved. I am not sure why, but i guess maybe AMD is afraid of careless users who drop the old DDR K8 into a new DDR2 platform... During socket A, dropping a barton into an SDRAM platform doesn't harm because the mem controller is in the NB, but now the mem controller is in the CPU. Dunno the consequent though, but it *might* burn, hahahah. I guess the upcoming AM3 version of Barcelona will have some detection mechanism to prevent this scenario happens, when dropping the AM3 K8L into AM2+ platform.
Those unused pins are usually there for mechanical purpose (strength/warp/crack) and have no signal or just grounding.Typically they'll just change the pin-out i.e. pin A2 used to be VCC is now VSS etc. Worse thing that could happen is the machine not booting up. It has nothing to do with IMC or NB.
One major difference btw AMD and Intel is AMD goes for more pins than necessary to support a few generations while Intel goes for the bare minimum for cost reduction at the expense of more frequent socket change. But I believe given the cost of substrate and assembly going up AMD will eventually have to go for the minimum pin-count approach.
Apr 16 2007, 11:45 PM

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