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 RAM Handbook, updating ... zlol 23/12/07

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silkworm
post Jan 16 2006, 03:20 PM

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Joined: Jan 2003
From: Kajang


Way to go chargey, btw, some minor corrections for ya:
QUOTE(charge-n-go @ Jan 15 2006, 01:34 PM)
- eg. DDR400 2-3-3-7. <-- has CAS latency of 2.
"2" means the delay measured in clock cycles. So, at 200MHz, 2 Hz is wasted to 'wait' for CAS.

- The actual time delay per clock = 1/200MHz = 5 nanosecond (ns). When 2 Hz is wasted, that means the memory controller have to wait 2(5 ns) = 10ns to access the Column (CAS).
You mean 2 clock ticks. 2Hz has an interval of 500ms which is way too long. tongue.gif

 

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