FSB or HTT has nothing to do with timing. THe timing is for RAM only.

Actually it's easy. the 2 in 2-3-3-7 means 2 clock delay.
The clock here actually means the clock speed of the memory.

If the memory is running at 200MHz, it has a delay of 1/200M. This delay is the same as a delay of 1 clock cycle. So the 2 here means, 1/100M second delay.

That is why when u clock higher, the effective latency actually decreases even u put CL3.0. At 300MHz (DDR600), CL3.0 delay = 3/300M = 1/100M <--- same as CL2 DDR400.

I also forgotten, but if i recalled correctly, CAS is the most important.

You can easily test it: Run Sisoftware Sandra memory benchtest (UN-buffered). Change one of the timing by '1' (either increasing or decreasing) and see the results.

heh, i'm outdated. Mine to explain a lil why RAS to CAS followed by RAS precharge/delay? Or do you have any links on that. Really interested to know why isit like tat now

thanx