I still think that you just need to tweak a little bit the memory configuration setting... no big deal.
AMD 64/SEMPRON ---- OC DATABASE, Ocing results..OC problem?ask here..
AMD 64/SEMPRON ---- OC DATABASE, Ocing results..OC problem?ask here..
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Oct 26 2005, 09:39 PM
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#61
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15,903 posts Joined: Jan 2003 From: Miri |
I still think that you just need to tweak a little bit the memory configuration setting... no big deal.
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Oct 27 2005, 02:13 AM
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#62
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15,903 posts Joined: Jan 2003 From: Miri |
QUOTE(Najmods @ Oct 26 2005, 11:09 PM) Well,I tested my CPU.This Sempron wont handle 2 stick of RAM above 285HTT. looks like this is the limitation of this CPU,I try to bump the voltage (even up to 1.7V) but it failed Prime95 in Small FFT(data fits in L2 cache),which simply means that it not the RAM that not stable,its the CPU itself is the limitation. Your Sempron is based on E6 rev Venice.... therefore, such limitation is not relevant.The reason why I ask u to tweak the memory configuration (the extra timings) is simply because the memory controller is in the CPU itself. Refer to dfi-street overclocking base results for your base setting, and then you start to tweak further from there. I believe you never touched the extra timings yet don't u? |
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Oct 27 2005, 03:25 PM
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#63
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15,903 posts Joined: Jan 2003 From: Miri |
can you post your complete DFI bios timing settings?
already use LDT multi 3x? Maybe u need 2.5x.... |
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Oct 27 2005, 09:47 PM
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#64
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15,903 posts Joined: Jan 2003 From: Miri |
try these....
HT frequency = 3 (or lower.... 2x if possible. if there is 2.5x... then use 2.5) Row Cycle Time = 12 (or lower) Row Refresh Cycle Timer = 24 Max Async Lantecy = 8 Read Preamble Value = 6 Idle Cycle Limit = 256clk Burst length = 4 Beats 1T/2T memory timing = 1T also try to bump your cpu voltage 1 step. This post has been edited by soulfly: Oct 27 2005, 09:49 PM |
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Oct 28 2005, 10:34 AM
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#65
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15,903 posts Joined: Jan 2003 From: Miri |
The thing is... each time you use different divider, you will need to have different configuration with the RAM.
for instance.... I can do DDR600 prime stable with 1:1 (300/300) but the.... it wont prime stable at DDR600 with 9:10 (300/338). at first it wouldn't even memtest stable at that setting, but after a few tweaking i can get superpi 32m and occt finish, only that still have problem with prime.... error after 3hrs. it can do prime stable at DDR540 with 5:6 (270/338). before that with 2.5-4-3-7, but then after some minor tweaking i could running it at 2.3-3-7. all these are done by tweaking the extra memory options |
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Nov 17 2005, 05:16 PM
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#66
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15,903 posts Joined: Jan 2003 From: Miri |
actually cpu-z does not display it wrongly
it's correct CPU/11 = DRAM speed... since the K8s actually don't have fsb. The ram divided from the clockspeed, not 'FSB' |
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Nov 25 2005, 11:19 AM
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#67
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15,903 posts Joined: Jan 2003 From: Miri |
u sure u need so high voltage for that speed?
even my sempron palermo only need 1.63v for 2.7ghz |
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Dec 5 2005, 11:48 PM
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#68
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15,903 posts Joined: Jan 2003 From: Miri |
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Dec 21 2005, 09:02 PM
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#69
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15,903 posts Joined: Jan 2003 From: Miri |
cpu-z validation is not enuff.... show some prime!
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Dec 28 2005, 06:36 PM
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#70
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15,903 posts Joined: Jan 2003 From: Miri |
QUOTE(awang @ Dec 28 2005, 02:12 PM) owh,its locked? 2800+ and below is locked because the Cool n Quiet support is disabled. For 3000+ and above, Cool n Quiet support is enabled, and multipliers can be adjusted. |
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Jan 1 2006, 12:20 PM
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#71
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15,903 posts Joined: Jan 2003 From: Miri |
get a single rail with high amps is better than dual rails, unless you're going dual rails with 600w and above
This post has been edited by soulfly: Jan 1 2006, 12:21 PM |
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Jan 6 2006, 02:54 PM
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#72
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15,903 posts Joined: Jan 2003 From: Miri |
There are newer batch of S-754 Athlon64 using Venice E6 core..... 512B L2 cache of course.....
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Jan 7 2006, 01:09 AM
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#73
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15,903 posts Joined: Jan 2003 From: Miri |
Just update your mobo with the latest BIOS, that should pretty much fix it.
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Jan 12 2006, 12:45 PM
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#74
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15,903 posts Joined: Jan 2003 From: Miri |
QUOTE(mansrx @ Jan 11 2006, 08:17 PM) Thanks soulfly, problem solved using the latest CPU-Z(1.31). My S-754 Athlon64 using Venice core. Is 90nm = 0.09? Yup...90nm = 0.09m 130nm = 0.13m |
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Jan 12 2006, 08:21 PM
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#75
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15,903 posts Joined: Jan 2003 From: Miri |
Not bad I should say, but it's a waste to run TCCD 3-4-4-8 at only 280mhz
maybe you could tighten up the timings, 280mhz 2.5-3-3-7 sounds better. TCCDs can do that quite easy I should say. |
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Jan 13 2006, 10:50 AM
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#76
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15,903 posts Joined: Jan 2003 From: Miri |
micron should be µ actually ..... 90nµ or 0.09µ
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Jan 13 2006, 12:21 PM
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#77
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15,903 posts Joined: Jan 2003 From: Miri |
yes....i'm wrong
damn.... how come didn't realize that i type nµ... memalukan diri sendiri |
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Jan 20 2006, 04:22 PM
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#78
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15,903 posts Joined: Jan 2003 From: Miri |
QUOTE It is already 2006, so AMD64/Sempron OC Database clean-up will be done tonight, expect some new database posting requirements later on. QUOTE Benchable and Bootable results will be eliminated from the database ranking, however discussion is still possible. New ranking somehow will be based on prime stable results only. QUOTE Ranking will still be based on the highest clockspeed. QUOTE Database will be divided into 3 categories which are socket-939 (Athlon64, Athlon64 FX, Opteron), socket-939 X2 (dual cores) and socket-754 (Athlon64, Sempron, Turion & mobile Athlon64/Sempron). QUOTE Ranking format will be overclocked speed - user - cpu type - cpu stepping - cpu voltage - cooling method (air/water/etc) Example: 1. 2911MHz | HornyGuy | Athlon64 X2 3800+ | CDBHE 0527UPAW | 1.60V | WATER 2. 2800MHz | I-luv-frogs | Athlon64 X2 3800+ | CDBHE 0528EPAW | 1.52V | AIR 3. .... 4. .... Ranking list will be linked to result posting. Please provide necessary informations in your posting for reference and discussion use. |
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